Novel seam-free gap fill process for STI in 28 nm CMOS technology

This study explores a seamless filling solution for "non-standard V-shaped" shallow trench isolation (STI) structures with high aspect ratios within a 28 nm CMOS process platform. The investigation utilizes the conventional High Aspect Ratio Process (HARP) in combination with post-steam high-temperature annealing. Through systematic cross-experiments, the effects of the modified HARP deposition process and the high-temperature annealing process on the shrinkage rate of HARP silicon oxide films were analyzed. Additionally, their influence on seam formation in high-aspect-ratio trenches was evaluated. The results indicate that the integration of the optimized HARP deposition process with pulsed high-temperature annealing, incorporating HCl as an auxiliary gas, effectively addresses seam-related challenges in high-aspect-ratio, non-standard V-shaped STI structures within the 28 nm CMOS process platform.