源漏硅化物扩散层分离技术对SOINMOS抗ESD的影响
Influence of silicide on the ESD protection in SOI NMOSFETs
-
摘要: 采用金属硅化物扩散层分隔技术制备了源漏区具有不同硅化物挡板尺寸的环型栅PD SOI MOSFETs,通过CLP实验数据分析器件的硅化物隔离档板的尺寸对SOI NMOSTET抗ESD能力以及对多指栅ggnMOS管子导通均匀性的影响。结果显示,采用了硅化物隔离挡板的管子二次击穿电压明显提高;随着挡板尺寸增加,多指栅的导通均匀性得到明显改善。Abstract: Salicide-blocked PD SOI nMOSFETs were fabricated using LOCOS process with different Salicide-block sizes.We investigate these device failure under ESD stress through CLP experiment data.The results show that no-salicided PD-SOI MOSFETs have greater second-breakdown current per micron width（It2）.And it can be inferred that salicided-block plays a very important role in triggering all the fingers in a multi-finger SOI devices.
下载: