Abstract: A new wafer-level hermetic packaging structure for MEMS devices is reported by using through-wafer interconnects,which reduces the packaging cost,increases I/O densities in addition to the protection of the MEMS devices.Several wafer-level fabrication technologies were used in the structure fabrication process such as deep reactive ion etching（DRIE）,KOH etching,bottom-up copper filling,Sn solder bonding and PbSn bump fabrication.This process is compatible with standard IC process and is finished at wafer level.The hermeticity and bonding strength of the structure is also evaluated.Preliminary results show that the hermeticity meets the requirement of the criterion of MIL-STD 883E,method 1014.9,and the bonding strength is up to 8MPa.The design,fabrication and characterization of this packaging structure,and the applicability in MEMS packaging were presented.