一种改进导通时间的新型静电钳位电路

New ESD clamp circuit for enough turn-on time

  • 摘要: 文章介绍一种应用于芯片内核电源和地之间的二级静电放电保护钳位电路,新型动态静电放电保护钳位电路能够提供充足的导通时间,有效地改进静电尾波脉冲对微小尺寸器件的故障损害,尤其是针对业界先进工艺中超薄栅氧器件的保护。新型电路包含滤波动态探测电路用以监测静电脉冲波形,进而触发栅极耦合的静电管均匀开启;当静电脉冲消散时通过磁滞设计P型沟道反馈晶体管闭合静电钳位电路。与业界常用的电路对比,滤波电阻模块面积降低了八倍,极大地节约了静电保护模块面积。

     

    Abstract: This paper presents a chip internal second electrostatic discharge (ESD) protection clamp circuit between power and ground,it aimed to overcome the ESD trailing pulse destruction to the tiny devices,it relates to advanced process semiconductor ESD protection. New ESD clamp circuit design which consist of the advantage of filter detection circuit,using dynamic RC circuits to detect the ESD pulse,in order to trigger gate-coupled circuit turn-on uniformly,and the hysteresis design using feedback p-channel transistor to turn-off the ESD clamp quickly when ESD dissipating. For comparisons,New ESD clamp smart circuit decrease the area of resistor eightfold than normal ESD clamp circuits,extraordinary saving the ESD protection module area.

     

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