Abstract:
Charging trap V-NAND technology has been used more and more widely because of its low unit storage cost, excellent write and read speed, and high reliability. SiO
2 is widely used as an isolation oxide layer, a tunneling oxide layer, a dielectric layer, and an ion implantation mask in V-NAND. The physical structure and energy band structure of the charging trap V-NAND basic memory cell is described, and the electron tunneling process in the write and erase process is also analyzed. The physical structures of the Bit Cost Scalable technology(BICS) and the Terabit Cell Array Transistor the storage area(TCAT) is compared, and the three-dimensional structure of the storage unit are analyzed. The principle of thermal oxidation, chemical vapor deposition, and atomic layer deposition were studied. The physical and electrical characteristics of SiO
2 films prepared by three methods were analyzed.