200 mm BCD器件用硅外延片制备技术研究

Study on 200mm Silicon Epitaxy Preparation Technology for BCD Process

  • 摘要: 本文涉及200 mm BCD(Bipolar-CMOS-DMOS)器件用硅外延片制备技术, 通过结合BCD工艺用外延材料的特性要求, 从外延图形漂移、外延层均匀性、表面缺陷等参数指标, 分析了衬底埋层浓度、生长温度、生长速率、缓冲层结构等工艺参数对外延参数的影响, 优化了BCD工艺用硅外延片的制备方法。本文采用常压化学气相沉积(CVD)技术制备了BCD工艺用200 mm硅(Si)外延材料, 通过Hg-CV、SP1及SRP对埋层外延片进行测试分析, 实验结果验证了工艺设计的正确性和有效性, 提升了大尺寸埋层外延制备技术的产业化水平。

     

    Abstract: Focusing on 200 mm silicon epitaxy preparation technology for BCD devices, based on the properties of epitaxial layer such as pattern shift, uniformity and surface defects, the influencing factors of the process such as concentration of buried dopant, deposition temperature, growth rate, structure of buffer layer were analyzed and the preparation technology was optimized.At last, the 200 mm Si epitaxial wafer for the BCD process was prepared by CVD method and the properties of the epitaxial layer were evaluated by Hg-CV, SP1 and SRP.The experimental results were in according with the process design results which improved the mass production of silicon buried layer epitaxial wafer for BCD process.

     

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